IC 555 Design Note

IC 555 is the popular timer Integrated circuit inevitable for many timer applications. It is widely used in both analogue and digital circuits to generate short duration pulses. It can be designed as Monostable and Astable multivibrator and also as Bistable, Schmitt trigger etc. It is important to know the internal details of the IC 555 as well as its working to design a circuit error proof.

The block diagram of IC555 is shown here to explain its internal components. Internally the IC has

1. Two OpAmps called as upper and lower comparators which set and reset the Flip-Flop.

2. A voltage divider composed of three 5K resistors that gives reference voltage to the Non inverting inputs of the comparators.

3. Reference voltage for the upper comparator is set as 2/3 of Vcc while that of the lower comparator as 1/3 Vcc. These reference voltages determines the timing cycle of the IC.

4. The reference voltage of the comparator can be changed by giving an external voltage to the control pin5. This pin is connected internally with the Inverting input of comparator 1 and Non inverting input of comparator 2.

5. The status of the comparator can be changed by applying trigger pulses to the trigger pin 2. When a negative pulse is applied to pin 2, output of lower comparator becomes high and triggers the S input of the flip-Flop.

6. When a positive pulse is applied to the Threshold pin 6 of IC, the output of upper comparator becomes high and triggers the R input of Flip-Flop. This resets the Flip-Flop and its output Q becomes low.

7. When the voltage level at reset input (R) falls below 0.4 volts, Flip-Flop clears. When an external capacitor is connected between the threshold pin 7 and ground, and the Flip-Flop is in the reset state, the output Q_ remains high. This will saturate the internal transistor T1 and the external capacitor discharges through its collector. The charging time of the external capacitor can be calculated using the formula T = R.C Where T is in seconds, R External Resistor (between VCC and pin7) value in ohms and C external capacitor value in Farads.

IC 555 Pins and Parameters

Pin1. Ground Pin. Connected to negative rail.

Pin2.Trigger Pin

It gives negative trigger pulses to the lower comparator. The voltage level at this pin should be at least 2/3 of Vcc to avoid false triggering. For this, a pull up resistor between 1K and 10 K is connected between pin 2 and the positive rail. In this state, output of IC remains low. When a negative pulse more than 1/3 of Vcc is applied to pin 2, the lower comparator triggers changing the state of Flip-Flop and the output pin 3 goes high. In short, if the voltage at pin 2 is less than 1/3 Vcc, output turns high and more than 1/3 Vcc, output remains low.

Pin3. Output Pin

It is the output pin of IC555. It can give output voltage close to the supply voltage and maximum 200 mA current so that loads such as relays can be directly connected to the output.

Pin4. Reset Pin

This is the Reset pin which has important role in the working of IC555. It controls the Flip-Flop directly. When the reset pin 4 is grounded, both pin 3 (output) and 7 (discharge) goes low. If the reset pin is not used, it should be connected to the positive rail.

Pin 5. Control Voltage pin

This pin is used to give an external voltage to change the threshold and trigger reference voltage of the internal comparator. When the pin5 is not in use, it should be connected to negative rail via 0.01uF (103) capacitor.

Pin6. Threshold Pin

This pin gives threshold voltage to the upper comparator. In the monostable and Astable mode, a timing resistor(R) is connected to pin6 from positive rail. An external timing capacitor(C) is connected between pin 6 and ground. When the output pin3 is high followed by a trigger at pin 2, the capacitor charges through the resistor. When the voltage in the capacitor increases above the threshold level of pin 6, output turns low. This completes the charging cycle.

Pin 7. Discharge pin

This pin is the collector of the internal transistor T1. It is used to discharge the external timing capacitor when the out put turns low after the pin 6 attains the threshold level. When the output pin3 becomes high, the capacitor charges again.

Pin8. + Supply pin
This is the Vcc pin and voltage between 6 V and 15 V can be applied to this. In the CMOS version IC 7555 it is 3 to 15 volts.

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IC555 Design Note




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