CD 4017 Johnson counter – Design Trick 3

CD 4017 is the Johnson Decade counter IC used in Running light and Message display applications. It is a 5 stage divide by 10 counter with decoded outputs and a carry out bit. The counters inside the IC advances with each positive edge triggered pulse when the clock enable pin 13 is held low. Each decoded output is normally low and turns high with its time slot based on the input pulses. Each output remains high for a complete clock cycle. The carry out signal completes one full cycle for every 10/8clock input cycles and is used as ripple carry signal to the succeeding stages. The input signal can be from an oscillator such as an Astable multivibrator using IC555.

1. When ST ( Clock enable)pin is low, IC enables
2. When ST ( Clock enable)pin is high, IC disables
3. When Reset pin is low, counter continues
4. When Reset pin is high, counter stops
5. Carry out pin 12 goes high after 9th clock pulse
6. Carry out pin is used for cascading two or more counters
7. Pin 14 receives clock pulses from an oscillator to give high outputs from the IC with equal duration.
8. A 10K resistor should be connected between the clock input and ground, to keep the input low between the successive high pulses. This avoids, missing of pulses or Counter hanging up.

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